1. Field of the Invention
This invention relates generally to manufacturing of semiconductor products, and, more particularly, to a method and apparatus for automatically generating test semiconductor wafers based upon process performance in run-to-run control of semiconductor manufacturing.
2. Description of the Related Art
The technology explosion in the manufacturing industry has resulted in many new and innovative manufacturing processes. Today""s manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and, therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Among the important aspects in semiconductor device manufacturing are rapid thermal anneal (RTA) control, chemical mechanical polishing (CMP) control, etching, and overlay control. Overlay is one of several important steps in the photolithography area of semiconductor manufacturing. Overlay process involves measuring the misalignment between two successive patterned layers on the surface of a semiconductor device. Generally, minimization of misalignment errors is important to ensure that the multiple layers of the semiconductor devices are connected and functional.
Generally, process engineers currently analyze the process errors a few times a month. The results from the analysis of the process errors are used to make updates to process tool settings manually. Generally, a manufacturing model is employed to control the manufacturing processes. Some of the problems associated with the current methods include the fact that the process tool settings are only updated a few times a month. Furthermore, currently, the process tool updates are generally performed manually. Many times, errors in semiconductor manufacturing are not organized and reported to quality control personnel. Often, the manufacturing models themselves incur bias errors that could compromise manufacturing quality.
Generally, a set of processing steps is performed on a lot of wafers on a semiconductor manufacturing tool called an exposure tool or a stepper, followed by processing of the semiconductor wafers in etch tools. The manufacturing tool communicates with a manufacturing framework or a network of processing modules. The manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which the stepper is connected, thereby facilitating communications between the stepper and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script based upon a manufacturing model, which can be a software program that automatically retrieves the data needed to execute a manufacturing process. Often, semiconductor devices are staged through multiple manufacturing tools for multiple processes, generating data relating to the quality of the processed semiconductor devices. Many times, errors can occur during the processing of semiconductor devices.
There are many environmental factors that can affect the quality and efficiency of processed semiconductor wafers. These environmental factors include barometric pressure during process operation, certain gases present during process operation, temperature conditions, and relative humidity during process operation. Effects of the aforementioned environmental factors can lead to misprocessing of semiconductor wafers during manufacturing processes. One major effect of environmental factors in semiconductor manufacturing processes is the errors that occur in the critical dimensions of the processed semiconductor wafer. Errors in the critical dimensions of a semiconductor wafer can cause severe performance problems. Furthermore, to improve production efficiency, a manufacturing lot of semiconductor wafers are often processed without 100% of the processed semiconductor wafers being metrology tested. This can improve the probability that sub-standard semiconductor wafers are processed without adequate feedback correction.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
In one aspect of the present invention, a method is provided for automated generation of test semiconductor wafers. At least one process run of semiconductor devices is performed. A determination is made whether an excursion of the process exists. An automated test wafer generation process is performed in response to the determination that an excursion of the process exists. A control parameter modification sequence is implemented in response to an examination of the test wafers.
In another aspect of the present invention, an apparatus is provided for automated generation of test semiconductor wafers. The apparatus of the present invention comprises: a computer system; a manufacturing model coupled with the computer system, the manufacturing model being capable of generating at least one control input parameter signal; a machine interface coupled with the manufacturing model, the machine interface being capable of receiving process recipes from the manufacturing model; a processing tool capable of processing semiconductor wafers and coupled with the machine interface, the first processing tool being capable of receiving at least one control input parameter signal from the machine interface; a metrology tool coupled with the first processing tool and the second processing tool, the metrology tool being capable of acquiring metrology data; a metrology data processing unit coupled with the metrology tool and the computer system, the metrology data processing unit being capable of organizing the acquired metrology data and sending the organized metrology data to the computer system; an environmental sensor coupled to the processing tool, the environmental sensor being capable of acquiring environmental data during an operation of the processing tool; an environmental data analysis unit coupled with the environmental sensor, the environmental data analysis unit being capable of organizing the environmental data and correlating the environmental data with the metrology data; and a test wafer unit coupled with the computer system, the test wafer unit being capable of acquiring test wafers in response to the environmental data analysis.